[cts.https.html?q=webgpu:shader,validation,expression,precedence:binary_requires_parentheses:*]
  implementation-status: backlog
  [:op1="add";op2="add"]

  [:op1="add";op2="bin_and"]
    expected: FAIL

  [:op1="add";op2="bin_or"]
    expected: FAIL

  [:op1="add";op2="bin_xor"]
    expected: FAIL

  [:op1="add";op2="div"]

  [:op1="add";op2="eq"]

  [:op1="add";op2="ge"]

  [:op1="add";op2="gt"]

  [:op1="add";op2="le"]

  [:op1="add";op2="lt"]

  [:op1="add";op2="mod"]

  [:op1="add";op2="mul"]

  [:op1="add";op2="ne"]

  [:op1="add";op2="shl"]
    expected: FAIL

  [:op1="add";op2="shr"]
    expected: FAIL

  [:op1="add";op2="sub"]

  [:op1="bin_and";op2="add"]
    expected: FAIL

  [:op1="bin_and";op2="bin_and"]

  [:op1="bin_and";op2="bin_or"]
    expected: FAIL

  [:op1="bin_and";op2="bin_xor"]
    expected: FAIL

  [:op1="bin_and";op2="div"]
    expected: FAIL

  [:op1="bin_and";op2="eq"]

  [:op1="bin_and";op2="ge"]

  [:op1="bin_and";op2="gt"]

  [:op1="bin_and";op2="le"]

  [:op1="bin_and";op2="lt"]

  [:op1="bin_and";op2="mod"]
    expected: FAIL

  [:op1="bin_and";op2="mul"]
    expected: FAIL

  [:op1="bin_and";op2="ne"]

  [:op1="bin_and";op2="shl"]
    expected: FAIL

  [:op1="bin_and";op2="shr"]
    expected: FAIL

  [:op1="bin_and";op2="sub"]
    expected: FAIL

  [:op1="bin_or";op2="add"]
    expected: FAIL

  [:op1="bin_or";op2="bin_and"]
    expected: FAIL

  [:op1="bin_or";op2="bin_or"]

  [:op1="bin_or";op2="bin_xor"]
    expected: FAIL

  [:op1="bin_or";op2="div"]
    expected: FAIL

  [:op1="bin_or";op2="eq"]

  [:op1="bin_or";op2="ge"]

  [:op1="bin_or";op2="gt"]

  [:op1="bin_or";op2="le"]

  [:op1="bin_or";op2="lt"]

  [:op1="bin_or";op2="mod"]
    expected: FAIL

  [:op1="bin_or";op2="mul"]
    expected: FAIL

  [:op1="bin_or";op2="ne"]

  [:op1="bin_or";op2="shl"]
    expected: FAIL

  [:op1="bin_or";op2="shr"]
    expected: FAIL

  [:op1="bin_or";op2="sub"]
    expected: FAIL

  [:op1="bin_xor";op2="add"]
    expected: FAIL

  [:op1="bin_xor";op2="bin_and"]
    expected: FAIL

  [:op1="bin_xor";op2="bin_or"]
    expected: FAIL

  [:op1="bin_xor";op2="bin_xor"]

  [:op1="bin_xor";op2="div"]
    expected: FAIL

  [:op1="bin_xor";op2="eq"]

  [:op1="bin_xor";op2="ge"]

  [:op1="bin_xor";op2="gt"]

  [:op1="bin_xor";op2="le"]

  [:op1="bin_xor";op2="lt"]

  [:op1="bin_xor";op2="mod"]
    expected: FAIL

  [:op1="bin_xor";op2="mul"]
    expected: FAIL

  [:op1="bin_xor";op2="ne"]

  [:op1="bin_xor";op2="shl"]
    expected: FAIL

  [:op1="bin_xor";op2="shr"]
    expected: FAIL

  [:op1="bin_xor";op2="sub"]
    expected: FAIL

  [:op1="div";op2="add"]

  [:op1="div";op2="bin_and"]
    expected: FAIL

  [:op1="div";op2="bin_or"]
    expected: FAIL

  [:op1="div";op2="bin_xor"]
    expected: FAIL

  [:op1="div";op2="div"]

  [:op1="div";op2="eq"]

  [:op1="div";op2="ge"]

  [:op1="div";op2="gt"]

  [:op1="div";op2="le"]

  [:op1="div";op2="lt"]

  [:op1="div";op2="mod"]

  [:op1="div";op2="mul"]

  [:op1="div";op2="ne"]

  [:op1="div";op2="shl"]
    expected: FAIL

  [:op1="div";op2="shr"]
    expected: FAIL

  [:op1="div";op2="sub"]

  [:op1="eq";op2="add"]

  [:op1="eq";op2="bin_and"]

  [:op1="eq";op2="bin_or"]

  [:op1="eq";op2="bin_xor"]

  [:op1="eq";op2="div"]

  [:op1="eq";op2="eq"]

  [:op1="eq";op2="ge"]

  [:op1="eq";op2="gt"]

  [:op1="eq";op2="le"]

  [:op1="eq";op2="log_and"]

  [:op1="eq";op2="log_or"]

  [:op1="eq";op2="lt"]

  [:op1="eq";op2="mod"]

  [:op1="eq";op2="mul"]

  [:op1="eq";op2="ne"]

  [:op1="eq";op2="shl"]

  [:op1="eq";op2="shr"]

  [:op1="eq";op2="sub"]

  [:op1="ge";op2="add"]

  [:op1="ge";op2="bin_and"]

  [:op1="ge";op2="bin_or"]

  [:op1="ge";op2="bin_xor"]

  [:op1="ge";op2="div"]

  [:op1="ge";op2="eq"]

  [:op1="ge";op2="ge"]

  [:op1="ge";op2="gt"]

  [:op1="ge";op2="le"]

  [:op1="ge";op2="log_and"]

  [:op1="ge";op2="log_or"]

  [:op1="ge";op2="lt"]

  [:op1="ge";op2="mod"]

  [:op1="ge";op2="mul"]

  [:op1="ge";op2="ne"]

  [:op1="ge";op2="shl"]

  [:op1="ge";op2="shr"]

  [:op1="ge";op2="sub"]

  [:op1="gt";op2="add"]

  [:op1="gt";op2="bin_and"]

  [:op1="gt";op2="bin_or"]

  [:op1="gt";op2="bin_xor"]

  [:op1="gt";op2="div"]

  [:op1="gt";op2="eq"]

  [:op1="gt";op2="ge"]

  [:op1="gt";op2="gt"]

  [:op1="gt";op2="le"]

  [:op1="gt";op2="log_and"]

  [:op1="gt";op2="log_or"]

  [:op1="gt";op2="lt"]

  [:op1="gt";op2="mod"]

  [:op1="gt";op2="mul"]

  [:op1="gt";op2="ne"]

  [:op1="gt";op2="shl"]

  [:op1="gt";op2="shr"]

  [:op1="gt";op2="sub"]

  [:op1="le";op2="add"]

  [:op1="le";op2="bin_and"]

  [:op1="le";op2="bin_or"]

  [:op1="le";op2="bin_xor"]

  [:op1="le";op2="div"]

  [:op1="le";op2="eq"]

  [:op1="le";op2="ge"]

  [:op1="le";op2="gt"]

  [:op1="le";op2="le"]

  [:op1="le";op2="log_and"]

  [:op1="le";op2="log_or"]

  [:op1="le";op2="lt"]

  [:op1="le";op2="mod"]

  [:op1="le";op2="mul"]

  [:op1="le";op2="ne"]

  [:op1="le";op2="shl"]

  [:op1="le";op2="shr"]

  [:op1="le";op2="sub"]

  [:op1="log_and";op2="eq"]

  [:op1="log_and";op2="ge"]

  [:op1="log_and";op2="gt"]

  [:op1="log_and";op2="le"]

  [:op1="log_and";op2="lt"]

  [:op1="log_and";op2="ne"]

  [:op1="log_or";op2="eq"]

  [:op1="log_or";op2="ge"]

  [:op1="log_or";op2="gt"]

  [:op1="log_or";op2="le"]

  [:op1="log_or";op2="lt"]

  [:op1="log_or";op2="ne"]

  [:op1="lt";op2="add"]

  [:op1="lt";op2="bin_and"]

  [:op1="lt";op2="bin_or"]

  [:op1="lt";op2="bin_xor"]

  [:op1="lt";op2="div"]

  [:op1="lt";op2="eq"]

  [:op1="lt";op2="le"]

  [:op1="lt";op2="log_and"]

  [:op1="lt";op2="log_or"]

  [:op1="lt";op2="lt"]

  [:op1="lt";op2="mod"]

  [:op1="lt";op2="mul"]

  [:op1="lt";op2="ne"]

  [:op1="lt";op2="shl"]

  [:op1="lt";op2="sub"]

  [:op1="mod";op2="add"]

  [:op1="mod";op2="bin_and"]
    expected: FAIL

  [:op1="mod";op2="bin_or"]
    expected: FAIL

  [:op1="mod";op2="bin_xor"]
    expected: FAIL

  [:op1="mod";op2="div"]

  [:op1="mod";op2="eq"]

  [:op1="mod";op2="ge"]

  [:op1="mod";op2="gt"]

  [:op1="mod";op2="le"]

  [:op1="mod";op2="lt"]

  [:op1="mod";op2="mod"]

  [:op1="mod";op2="mul"]

  [:op1="mod";op2="ne"]

  [:op1="mod";op2="shl"]
    expected: FAIL

  [:op1="mod";op2="shr"]
    expected: FAIL

  [:op1="mod";op2="sub"]

  [:op1="mul";op2="add"]

  [:op1="mul";op2="bin_and"]
    expected: FAIL

  [:op1="mul";op2="bin_or"]
    expected: FAIL

  [:op1="mul";op2="bin_xor"]
    expected: FAIL

  [:op1="mul";op2="div"]

  [:op1="mul";op2="eq"]

  [:op1="mul";op2="ge"]

  [:op1="mul";op2="gt"]

  [:op1="mul";op2="le"]

  [:op1="mul";op2="lt"]

  [:op1="mul";op2="mod"]

  [:op1="mul";op2="mul"]

  [:op1="mul";op2="ne"]

  [:op1="mul";op2="shl"]
    expected: FAIL

  [:op1="mul";op2="shr"]
    expected: FAIL

  [:op1="mul";op2="sub"]

  [:op1="ne";op2="add"]

  [:op1="ne";op2="bin_and"]

  [:op1="ne";op2="bin_or"]

  [:op1="ne";op2="bin_xor"]

  [:op1="ne";op2="div"]

  [:op1="ne";op2="eq"]

  [:op1="ne";op2="ge"]

  [:op1="ne";op2="gt"]

  [:op1="ne";op2="le"]

  [:op1="ne";op2="log_and"]

  [:op1="ne";op2="log_or"]

  [:op1="ne";op2="lt"]

  [:op1="ne";op2="mod"]

  [:op1="ne";op2="mul"]

  [:op1="ne";op2="ne"]

  [:op1="ne";op2="shl"]

  [:op1="ne";op2="shr"]

  [:op1="ne";op2="sub"]

  [:op1="shl";op2="add"]
    expected: FAIL

  [:op1="shl";op2="bin_and"]
    expected: FAIL

  [:op1="shl";op2="bin_or"]
    expected: FAIL

  [:op1="shl";op2="bin_xor"]
    expected: FAIL

  [:op1="shl";op2="div"]
    expected: FAIL

  [:op1="shl";op2="eq"]

  [:op1="shl";op2="ge"]

  [:op1="shl";op2="gt"]

  [:op1="shl";op2="le"]

  [:op1="shl";op2="lt"]

  [:op1="shl";op2="mod"]
    expected: FAIL

  [:op1="shl";op2="mul"]
    expected: FAIL

  [:op1="shl";op2="ne"]

  [:op1="shl";op2="shl"]
    expected: FAIL

  [:op1="shl";op2="shr"]
    expected: FAIL

  [:op1="shl";op2="sub"]
    expected: FAIL

  [:op1="shr";op2="add"]
    expected: FAIL

  [:op1="shr";op2="bin_and"]
    expected: FAIL

  [:op1="shr";op2="bin_or"]
    expected: FAIL

  [:op1="shr";op2="bin_xor"]
    expected: FAIL

  [:op1="shr";op2="div"]
    expected: FAIL

  [:op1="shr";op2="eq"]

  [:op1="shr";op2="ge"]

  [:op1="shr";op2="gt"]

  [:op1="shr";op2="le"]

  [:op1="shr";op2="lt"]

  [:op1="shr";op2="mod"]
    expected: FAIL

  [:op1="shr";op2="mul"]
    expected: FAIL

  [:op1="shr";op2="ne"]

  [:op1="shr";op2="shl"]
    expected: FAIL

  [:op1="shr";op2="shr"]
    expected: FAIL

  [:op1="shr";op2="sub"]
    expected: FAIL

  [:op1="sub";op2="add"]

  [:op1="sub";op2="bin_and"]
    expected: FAIL

  [:op1="sub";op2="bin_or"]
    expected: FAIL

  [:op1="sub";op2="bin_xor"]
    expected: FAIL

  [:op1="sub";op2="div"]

  [:op1="sub";op2="eq"]

  [:op1="sub";op2="ge"]

  [:op1="sub";op2="gt"]

  [:op1="sub";op2="le"]

  [:op1="sub";op2="lt"]

  [:op1="sub";op2="mod"]

  [:op1="sub";op2="mul"]

  [:op1="sub";op2="ne"]

  [:op1="sub";op2="shl"]
    expected: FAIL

  [:op1="sub";op2="shr"]
    expected: FAIL

  [:op1="sub";op2="sub"]


[cts.https.html?q=webgpu:shader,validation,expression,precedence:mixed_logical_requires_parentheses:*]
  implementation-status: backlog
  [:op1="log_and";op2="log_and";parens="left"]

  [:op1="log_and";op2="log_and";parens="none"]

  [:op1="log_and";op2="log_and";parens="right"]

  [:op1="log_and";op2="log_or";parens="left"]

  [:op1="log_and";op2="log_or";parens="none"]
    expected: FAIL

  [:op1="log_and";op2="log_or";parens="right"]

  [:op1="log_or";op2="log_and";parens="left"]

  [:op1="log_or";op2="log_and";parens="none"]
    expected: FAIL

  [:op1="log_or";op2="log_and";parens="right"]

  [:op1="log_or";op2="log_or";parens="left"]

  [:op1="log_or";op2="log_or";parens="none"]

  [:op1="log_or";op2="log_or";parens="right"]


[cts.https.html?q=webgpu:shader,validation,expression,precedence:other:*]
  [:expr="addr_member"]

  [:expr="and_addr"]

  [:expr="and_addr_paren"]

  [:expr="comp_member"]

  [:expr="deref_idx"]

  [:expr="deref_idx_paren"]

  [:expr="deref_member"]

  [:expr="deref_member_paren"]

  [:expr="log_and_member"]

  [:expr="log_or_member"]

  [:expr="neg_member"]


[cts.https.html?q=webgpu:shader,validation,expression,precedence:other_lhs:*]
  [:expr="addr_valid1"]

  [:expr="addr_valid2"]

  [:expr="addr_valid3"]

  [:expr="deref_invalid1"]

  [:expr="deref_invalid2"]

  [:expr="deref_valid1"]

  [:expr="deref_valid2"]
